Posted On Jun 22

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Associate Engineer, MNAND VALIDATION

Micron Technology

Location : Hyderabad, Telangana

Headquarters : Boise, Idaho, United States

Hiring Mode : Full Time

Experience : Mid Level

Job Description

As an NVE Managed NAND Validation Engineer at Micron Technology, you will be responsible for developing and implementing strategies for the validation and characterization of managed NAND products. These strategies will require you to develop and document software and hardware test solutions used to validate and characterize products against requirements and specifications, and procedures for all product types. Your responsibilities will also include providing investigative support for validation, characterization, qualification, and customer issues.
Responsibilities include, but not limited to:
  • Validation of Managed NAND products using different test strategies
  • Collaborate with Managed NAND PDT, FW, and eco system teams to develop UFS/eMMC system test suites and develop API for production firmware enablement
  • Embedded Device and System Failure Analysis and Debug
  • Understand NAND defect mechanisms and Managed NAND system error recovery features
  • Collaborate with process owners, firmware developers, validation engineers, and test developers to identify valuable improvements to our products and processes.
  • Extensive usage of data parsing and data analysis for improving yields, test times and quality of the products.
  • Thorough understanding of Firmware Architecture.
  • Explore and recommend improvements to MNAND validation, including test coverage plans, validation strategies, and validation processes.
  • Collaborate with process owners, firmware developers, validation engineers, and test developers to identify valuable improvements to our products and processes.
  • You will work on projects from their earliest inception, co-design environments and support the design through customer qualification and ramp into production
  • You will study and understand new features proposed in JEDEC and development prototype/proof of concept innovation solutions.
  • You possess a bachelor’s degree in electrical engineering or equivalent
  • You have the ability and willingness to travel, sometimes internationally, 2/3 times a year for up to 3-4 months
Candidates with the following experience and skills will have advantage:
  • Understanding of storage interfaces including UFS, eMMC, NVMe
  • Strong Knowledge in C/C++, Python is added advantage
  • Lab Equipment: (Protocol Analyzer, Oscilloscope, Logical Analyzer)
Preferred Skills:
  • Strong communication skills both written and verbal
  • You have strong interpersonal skills and maintain positive relationships with colleagues
  • You are ambitious, focused, and dedicated.
  • You strive to collaborate effectively in a dynamic environment

About Micron Technology, Inc.
We are an industry leader in innovative memory and storage solutions. Through our global brands – Micron® and Crucial® – our broad portfolio of high-performance memory and storage technologies, including DRAM, NAND, 3D XPoint™ memory and NOR, is transforming how the world uses information to enrich life. Backed by more than 40 years of technology leadership, our memory and storage solutions enable disruptive trends, including artificial intelligence, 5G, machine learning and autonomous vehicles, in key market segments like mobile, data center, client, consumer, industrial, graphics, automotive, and networking. Our common stock is traded on the Nasdaq under the MU symbol. To learn more visit

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

For US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron’s Human Resources Department at 1-800-336-8918 or 208-368-4748 and/or by completing our General Contact Form

Performs hardware, software, semiconductor design or telecomm engineering assignments. This job mapping should be used only if the position cannot be mapped specifically to other design/development engineering jobs.